21CS34 Dayananda Sagar University • Computer Science & Engineering (Semester 3)

Computer Organization and Architecture

💡 DSU Exam Strategy & Guidance

Memory Hierarchy, Cache Mapping (Direct, Set-Associative), Pipelining Hazards, and Booth’s Multiplication Algorithm.

High-Yield Passing Strategy: Solve numericals on Cache Hit/Miss ratios and instruction execution cycles.
Most Repeated Question Topics:
Cache Memory Mapping TechniquesInstruction Pipelining HazardsBooth’s Multiplication AlgorithmDMA Controller Block Diagram

🔥 Most Predictable Exam Questions (2)

Guaranteed Every Year 8 Marks Module 2: Arithmetic Logic Unit

Q1. Demonstrate Booth’s Multiplication Algorithm to multiply multiplicand M = 7 (0111) and multiplier Q = -3 (1101) showing register states (A, Q, Q-1) after each arithmetic cycle.

Key Points: Initialize A=0000, Q=1101, Q-1=0, Count=4. Check Q0 Q-1: 10 => A = A - M, Arithmetic Right Shift (ARS); 01 => A = A + M, ARS; 00/11 => ARS. Final result in A:Q = 11101011 (-21).

95% Probability 8 Marks Module 4: Memory System Hierarchy

Q2. Explain Cache Memory mapping techniques: (i) Direct Mapping, (ii) Associative Mapping, and (iii) Set-Associative Mapping with address format breakdown and hit/miss evaluation.

Key Points: Direct: Block address = i mod (number of lines). Associative: any block to any line. Set-Associative: block address mod (number of sets). Break down Tag, Set/Index, and Word/Byte offset fields.

🎓 Open Source Courses & Video Playlists (2)

MIT OpenCourseWare

MIT 6.004: Computation Structures

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YouTube (Gate Smashers)

Gate Smashers: Computer Architecture & Organization

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📄 Previous Year Question Papers (1)

END_SEM • 2024

End Semester Exam 2024

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